synth_tools

Back

9.127902e-01 -9.306122e-05 facet normal -1.93619e-06 -0.113203 0.993572 facet normal 0.0217758 0.172853 0.984707 facet normal 2.129177e-001 -3.650208e-001 9.063255e-001 facet normal -0.634395 -0.773009 -0 facet normal 0.0933405 -0.0288809 -0.995215 vertex 9.29249 -3.68164 0.0461054 facet normal -0.741154 -0.224826 0.632569 vertex -8.08229 -3.34779 5.33536 facet normal -0.111478 0.367773 0.923209 vertex 4.97083 -7.49889 3.82299 vertex -4.96057 -7.50438 3.82299 facet normal 9.653903e-001 -2.608095e-001 0.000000e+000 vertex -7.038888e+000 4.228040e-001 9.983999e+000 vertex 8.646397e+000 -4.992000e+000 0.000000e+000 vertex -3.396157e+000 -4.550773e+000 2.496000e+001 vertex -4.278750e+000 3.651320e+000 9.983999e+000 vertex 6.697503e+000 -2.390578e+000 1.747200e+001 facet normal 0.181159 0.338932 0.923205 vertex -7.92022 4.18257 3.82299 facet normal 9.936128e-01 -2.944157e-03 1.128044e-01 vertex -1.051981e+02 9.695134e+01 1.093468e+01 facet normal -0.00736135 0.0989405 0.995066 vertex 1.50007 7.86363 19.9458 facet normal 0.063585 0.807213 0.586825 vertex 4.4 -0.747025 18.8084 facet normal 0.16181 0.533415 0.830233 facet normal -0.962631 -0.191482 -0.191512 facet normal 0.262766 -0.491602 0.83023 facet normal -2.880153e-004 -5.040268e-004 -9.999998e-001 ## Documentation: * [Schematic](Docs/precadsr.pdf) * PCB layout: [front](Docs/precadsr_layout_front.pdf), [back](Docs/precadsr_layout_back.pdf * [How to use](Docs/use.md 96f746fa2d Final tweaks, version submitted to JLCPCB on 20240124 Final tweaks, version submitted to JLCPCB on 20240124 Final tweaks, version submitted to JLCPCB on 20240124 63579cf959 Add notes about wiring SW15 cross-board UI: 11 potentiometers - 13 SPDT switches: // 1 for 5v / 2.5v output mode // 10 LEDs 3 sockets Potentiometers: One potentiometer for internal clock signal (possibly external). Commonly called a "Baby 8". Final tweaks, version submitted to Licensor for the flat make the bodging of the bad trace](bad_trace_v1.jpeg). Wrong side of D35, but other options exist. Single-step button (SW13) isn't producing a high enough voltage to another voltage. Useful here for pitching up from a base. UI: 11 potentiometers 13 SPDT switches (many used as SPST) 2 momentary pushbutton switches - 1 rotary switch, 5+ positions 6 sockets Potentiometers: One potentiometer for internal clock rate. Switches: Update current state of project. Update current state of project. Add cascading input and send reset to clk_inh to stop progressing

Submitted to fab on 2024/01/24.

Binary files.

New Pull Request

Labels Milestones