synth_tools

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Playbook REP: repique CAX: caixa MSD: mid surdo (sometimes MS1, MS2, etc, if pattern spans measures or has planned variations) BSD: back surdo (L for low, H for high)

R/L

Accented note (right/left hand suggested r/l Quieter, unaccented note * : trill, generally three very fast notes on repique/caixa, two or three for surdos Add schematic, start on PCB Added input resistor for sync; placed everything on PCB sandwich, making some final-ish decisions about connecting to front panel than usual. At least it is based on https://www.analog.com/media/en/technical-documentation/data-sheets/8063fa.pdf Altera BGA-36 V36 VBGA BGA-48 - pitch 0.8 mm BGA-64, 10x10 raster, 4.618x4.142mm package, pitch 0.8mm; see section 7.6 of http://www.st.com/resource/en/datasheet/stm32f429ng.pdf UFBGA-201, 15x15 raster, 10x10mm package, 0.5mm pitch; https://www.xilinx.com/support/documentation/user_guides/ug475_7Series_Pkg_Pinout.pdf#page=266, NSMD pad definition Appendix A BGA 1156 1 FF1156 FFG1156 FFV1156 Virtex-7 BGA, 34x34 grid, 35x35mm package, 1mm pitch; https://www.xilinx.com/support/documentation/user_guides/ug475_7Series_Pkg_Pinout.pdf#page=275, NSMD pad definition Appendix A BGA 676 1 RF676 RFG676 Artix-7 BGA, 26x26 grid, 27x27mm package, 1mm pitch; https://www.xilinx.com/support/documentation/user_guides/ug475_7Series_Pkg_Pinout.pdf#page=304, NSMD pad definition Appendix A BGA 484 0.8 SB484 SBG484 SBV484 Zynq-7000 BGA, 20x20 grid, 17x17mm package, 1mm pitch; https://www.xilinx.com/support/documentation/user_guides/ug475_7Series_Pkg_Pinout.pdf#page=275, NSMD pad definition (http://www.ti.com/lit/ml/mxbg270/mxbg270.pdf Texas Instruments, BGA Microstar Junior, 5x5mm, 80 ball 9x9 grid, NSMD pad definition Appendix A BGA 484 0.8 SBG485 SBV485 LFCSP, exposed pad, thermal vias, DDA0008J (http://www.ti.com/lit/ds/symlink/tps5430.pdf 8-pin HTSOP package with 1.27mm pin pitch, compatible with SOIC-8, 3.9x4.9mm² body, exposed pad, 4x4mm body, pitch 0.5mm, thermal vias in pads, 4 Pins (http://www.molex.com/pdm_docs/sd/559350530_sd.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py 10-Lead Plastic DFN (7mm x 4mm) (see Linear Technology DFN_32_05-08-1734.pdf DFN44 8.9x5, 0.4P; CASE 506BU-01 (see ON Semiconductor 506AF.PDF DKD Package; 24-Lead Plastic Shrink Small Outline No-Lead http://www.ti.com/lit/ml/mpds176e/mpds176e.pdf Plastic Small Outline (SN) - Narrow, 3.90 mm Body [DFN] (http://www.onsemi.com/pub/Collateral/NCP4308-D.PDF DD Package; 8-Lead Plastic Dual Flat, No Lead Package (8E) - 4x4x0.9 mm Body [TSSOP] with exposed pad (https://www.infineon.com/cms/en/product/packages/PG-DSO/PG-DSO-20-85/ Infineon SO package 20pin with exposed pad 4.5x7mm (https://www.infineon.com/cms/en/product/packages/PG-DSO/PG-DSO-20-71/ Infineon SO package 20pin with exposed pad 4.5x7mm (https://www.infineon.com/cms/en/product/packages/PG-DSO/PG-DSO-20-71/ Infineon SO package 20pin with exposed pad 4.5x7mm (https://www.infineon.com/cms/en/product/packages/PG-DSO/PG-DSO-20-71/ Infineon.

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