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Http://www.vishay.com/docs/70487/70487.pdf powerpak sc70 sc-70 dual Vishay PowerPAK SC70 dual transistor package http://www.vishay.com/docs/70487/70487.pdf powerpak sc70 sc-70 dual Vishay PowerPAK SC70 single transistor package http://www.vishay.com/docs/70486/70486.pdf TO-46-4 with Valox case, based on the circumference of the run/stop switch. Will hold open the gate of the 3PDT so these issues don't arise. Then again, that would make for 7 wires to run, so maybe not. It works this way. "pcb_color": "rgba(0, 0, 0, 0.000)", "track_width": 0.25, "via_diameter": 0.8, "via_drill": 0.4, More tweaks after pro review "different_unit_footprint": "error", "different_unit_net": "error", "duplicate_reference": "error", "duplicate_sheet_names": "error", More tweaks after pro review "different_unit_footprint": "error", "different_unit_net": "error", "duplicate_reference": "error", "duplicate_sheet_names": "error", More tweaks after pro review "multiple_net_names": "warning", "net_not_bus_member": "warning", "no_connect_connected": "warning", "no_connect_dangling": "warning", "pin_not_connected": "error", "pin_not_driven": "error", "pin_to_pin": "warning", "power_pin_not_driven": "error", "similar_labels": "warning", More tweaks after pro review Apply jlcpcb's design rules, small fixes for those Fireball/Fireball.kicad_pro | 32 Fireball/Fireball.kicad_sch | 4 | | | R16, R17, R19, R20 **Potentiometer, 9 mm vertical board mount | | Tayda | A-1531 or A-557 | | | | J2 | 1 | B10k | Potentiometer | | | | | | | Screws and spacers (see [build notes](build.md)) | | S3 | 1 | Synth_power_2x5 | 2x5 pin shrouded header 2.54 mm spacing | Tayda | A-804 | | R24, R26, R28 | 3 pin Molex header 2.54 mm spacing | Tayda | A-2939 | | R16, R17, R19, R20 | 4 .../PCB/precadsr_Gerbers/precadsr-PTH.drl | 207 .../PCB/precadsr_Gerbers/precadsr-job.gbrjob | 128 .../precadsr_aux_Gerbers/precadsr-B_Mask.gbr | 185 .../precadsr_aux_Gerbers/precadsr-F_Paste.gbr | 4 .../PCB/precadsr_Gerbers/precadsr-F_Cu.gbr | 4 Binary files.

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