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KiCad backups folders temp_* # Compressed files *.zip # Mac stuff *.DS_Store # Emacs temps *~ \#* # LTSpice Simulations/*.log Simulations/*.raw Simulations/*.txt Copper Layer Stackup: ============================================================= L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains plated through holes are merged with plated holes unplated through holes: ============================================================= 744b72ef7e0d94fccfae99ec3cb3514981ac4616 b1fcba1e78f37669542b35a3e32a5257c5c0240c 2dd0b8c0c736720a0b064bbe1304dc9562beb260 Latest commits for.

• 0.0376859 -0.272878 0.96131 facet normal.
• -0.927051 9.999 vertex 1.76336 -2.42705 0 vertex.
• 9.665134e+01 1.036085e+01 vertex -1.082663e+02 9.695134e+01 1.043239e+01 facet.

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