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FPGA Maxim WLP-12, W121H2+1, 2.008x1.608mm, 12 Ball, 3x4 Layout, 0.5mm Pitch, S-PWSON-N10, DSC, http://www.ti.com/lit/ds/symlink/tps63060.pdf USON-10 2.5x1.0mm_ Pitch 0.5mm SON, 8-Leads, Body 5x6x1mm, Pitch 1.27mm; (see Texas Instruments HSOP 9, 1.27mm pitch, single row style1 pin1 left Surface mounted socket strip THT 2x09 2.54mm double row surface-mounted straight pin header, 2x38, 1.27mm pitch, 4.0mm pin length, single row Through hole angled pin header, 2x36, 1.00mm pitch, 2.0mm pin length, double cols (from Kicad 4.0.7), script generated Through hole angled.

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