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X="3.0" y="1.3"/> Update luther's layout Update luther's layout BOTH false Directional false false Update luther's layout Drill report for precadsr-panel.kicad_pcb Created on Tue Mar 5 20:19:51 2024 Copper Layer Stackup: ============================================================= L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains T1 3.200mm 0.1260" (4 holes) (with 4 slots) T2 5.000mm 0.1969" (1 hole Total plated holes count 16 Not plated through holes: unplated through holes: ============================================================= T1 3.200mm 0.1260" (4 holes) T5 15.200mm 0.5984" (1 hole) T3 7.000mm 0.2756" (6 holes) T4 10.000mm 0.3937" (4 holes) (with 4 slots T2 5.000mm 0.1969" (1 hole) Total plated holes count 16 Not plated through holes are merged with plated holes unplated through holes: ============================================================= T1 3.200mm 0.1260" (4 holes) T5 15.200mm 0.5984" (1 hole Total plated holes count 16 Latest commits for file Synth Mages Power Word Stun Panel.kicad_prl", Synth Mages Power Word Stun.kicad_prl 78 lines From 3c7abf219614572e87f96c0e195a9732c02e7e99 Mon Sep 17 00:00:00 2001 Subject: [PATCH] Initial version .gitignore | 16 Docs/precadsr_bom.md | 4 | 100 nF | Unpolarized capacitor | | | J8 | 1 | 1uF | Unpolarized capacitor | | Tayda | A-1605 | | S2 | 1 | 2_pin_Molex_connector | 2 | 10k | Resistor | | C1, C11, C12 | 2 jackHoleDepth = 10; // [1:1:84.

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