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Mar 5 20:19:51 2024 Copper Layer Stackup: T5 15.200mm 0.5984" (1 hole T3 7.000mm 0.2756" (6 holes) T4 10.000mm 0.3937" (4 holes) (with 4 slots) T2 5.000mm 0.1969" (1 hole) T3 7.000mm 0.2756" (6 holes) T4 10.000mm 0.3937" (4 holes) T5 15.200mm 0.5984" (1 hole Total plated holes count 0 Hardware/Panel/precadsr-panel-Gerbers/precadsr-panel-CmtUser.gbr Normal file Unescape Hardware/PCB/precadsr/ao_tht.pretty/Wall_wart_A-4118.kicad_mod Normal file Unescape The build.

-4.050582e-01 9.142909e-01 8.142858e-05 vertex.
-5.447498e+000 1.441514e+000 1.747200e+001 facet normal 0.46863.
4.93725 7.38912 5.07603 facet.

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