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BackTrace main Add scad for v3.2 3afa35e4b1 PCB initial layout, no traces "silk_line_width": 0.15, PCB initial layout, no traces Using the Precision ADSR with retriggering and looping Binary files a/Schematics/Fireball_VCO.pdf and b/Schematics/Fireball_VCO.pdf differ main synth_tools/Schematics/SynthMages.pretty/PinSocket_1x02_P2.54mm_Vertical.kicad_mod 42 lines synth_tools/PCB Notes.txt 17 lines e8295830c4 STLs, 10hp version, others schematics b404e3f9c5 Update luther's layout
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