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Out 5e32fb4fc0 Change transistor footprint to inline_wide, fix DRC ground plane Latest commits for file Images/PXL_20210831_002553634.jpg main synth_tools/README.md 0 lines Latest commits for branch feature/seq_chaining Add CV in to pause the sequence. Probably can't do, or impractical: CV-controlled clock. Presumably the CV in to pause the clock 01bb4964a6 Add.

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