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Back"Layer F.Cu" "Notes": "Layers L1/L2" "Notes": "Layer F.Mask" "Notes": "Layer F.Paste" "Notes": "Layer F.Paste" "Notes": "Layer F.Cu" "Notes": "Layers L1/L2" "Notes": "Layer F.Paste" "Notes": "Layer B.Mask" "Notes": "Layer F.SilkS" "Notes": "Layer B.SilkS" ; DRILL file {KiCad 7.0.11-7.0.11~ubuntu22.04.1} date Tue Mar 5 20:19:51 2024 Copper Layer Stackup: T5 15.200mm 0.5984" (1 hole) Total plated holes count 16 Not plated through holes: ============================================================= T1 3.200mm 0.1260" (4 holes) (with 4 slots) T2 5.000mm 0.1969" (1 hole) Total plated holes count 16 Not plated through holes are merged with plated holes count 0 Minor layout tweaks Finish schematic, add PDF | J6 | 1 | B10k | **Potentiometer, 9 mm vertical pots. You can use it instead of latch, https://www.neutrik.com/en/product/nc3fah1-0 A Series, 3 pole female XLR receptacle, grounding: ground contact to mating connector shell and front panel, horizontal PCB mount, https://www.neutrik.com/en/product/nc3mbv-sw B Series, 5 pole female XLR receptacle, grounding: separate ground contact to mating connector shell and front panel, vertical PCB mount, additional ground contacts, https://www.neutrik.com/en/product/nc3mbv-e B Series, 3 pole female receptacle, grounding: separate ground contact connected to trigger, gate jack is normalized\nto +12 V, 10 mA -12 V ## Photos ### Photos ## Documentation: * [Schematic](Docs/precadsr.pdf) * PCB layout: [front](Docs/precadsr_layout_front.pdf), [back](Docs/precadsr_layout_back.pdf) * [BOM](Docs/precadsr_bom.md) * [Build notes](Docs/build.md ## GitHub repository ## Git repository * [https://github.com/holmesrichards/precadsr](https://github.com/holmesrichards/precadsr ## Submodules This repo uses submodules aoKicad and Kosmo_panel. To clone: Repo uses submodules aoKicad and Kosmo\_panel. To clone: submodules avoid non-circular holes in footprints whenever possible; some fabs charge more for ovals avoid non-circular holes in footprints whenever possible; some fabs charge more for ovals PCB layout: [front](Docs/precadsr_layout_front.pdf), [back](Docs/precadsr_layout_back.pdf) * [BOM](Docs/precadsr_bom.md) * [Build notes](Docs/build.md ## GitHub repository https://github.com/holmesrichards/precadsr Submodules Latest commits for file Panels/FireballSpell_Large.webp Images/PXL_20210831_000922493.jpg Normal file Unescape Hardware/Panel/precadsr_panel_al_Gerbers/precadsr_panel_al-F_Paste.gbr Normal file View File 3D Printing/Tools/jack-wrench.stl Executable file View File Schematics/notes.txt Normal file Unescape Hardware/Panel/precadsr_panel_al_Gerbers/precadsr_panel_al-F_Paste.gbr Normal file Unescape DEF Kosmo_panel_Jack_Hole H 0 40 N N 1 F N DEF 3_pin_Molex_connector J 0 40 Y Y 1 F N DEF SW_SPST_Lamp SW 0 0.
- - col_right + tolerance*4.
- 0.598005 -0.573948 0.559441 facet normal 0.590353 -0.804073.
- 1.087114e-001 4.842103e-004 9.940732e-001 vertex -4.214520e+000 1.590398e+000 2.495526e+001 facet.
- Small Signal NPN Transistor, TO-92 | | .