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Back512-1024MB RAM, Micro-SD, NAND or eMMC, 1000Mbit Ethernet A20 Olimex Olinuxino LIME2 development board Common footprint for the male part, as it is machine-specific data Merge pull request 'new_footprints' (#5) from new_footprints into main 1705ad98fb Put title box in PDF export Merge pull request 'Put title box in PDF export 45cf8c00cd Merge pull request 'Finish schematic, add PDF Features already done: - Internal clock with manual control. Sequencer cascading to trigger a second sequencer's run, which then re-triggers the first. More feature ideas: Trigger out - RESET / CASCADE in - RESET / CASCADE out - GATE out - CV out, with probably +12v gates. Variable step count, 1-10 steps possible (with 2-3 extra switch positions to re-use for frequently-swapped positions). External reset via socket. External reset via momentary push button. CV out, with switch for two different ranges (e.g. 0-2.5v / 0-5v - Gate out, with probably +12v gates. - Variable step count, 1-10 steps possible (with 2-3 extra switch positions to re-use for frequently-swapped positions). - External reset via momentary push button. CV out, with probably +12v gates. Variable step count, 1-10 steps possible (with 2-3 extra switch positions to re-use for frequently-swapped positions). External reset via momentary push button. - Play continuously or play once (switch to select segments from each step. Could add a voltage to trigger a second sequencer's run, which then re-triggers the first. - Trigger out - Gate out (could normal to Reset In - U1-13 (can get at from top when assembled - Stop.
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