Labels Milestones
BackSkeleton/Eurorack_box_v105.stl Executable file View File fp-info-cache Normal file View File Schematics/SynthMages.pretty/Switch.dcm Normal file View File 3D Printing/Cases/Eurorack Modular Case/EuroRack_Case_20.stl Executable file View File 3D Printing/Cases/Eurorack 2-Row/d0689b08d90f6b787384d8519c91dddf_preview_featured.jpg Executable file View File Hardware/Panel/precadsr_panel.svg Normal file Unescape Hardware/PCB/precadsr_aux_Gerbers/precadsr-B_SilkS.gbr Normal file Unescape Schematics/SynthMages.pretty/SOCKET_3_PIN_HEADER_NORMAL.kicad_mod Normal file Unescape Schematics/SynthMages.pretty/Micro SPDT (3 pin).kicad_mod main precadsr/Docs/build.md 65 lines # Temporary files *.lck # Netlist files (exported from Eeschema # Autorouter files (exported from Eeschema *.csv *.lck ########################## # Additional ignored # KiCad backups folders temp_* # Compressed files *.zip # Mac stuff *.DS_Store # Emacs temps *~ \#* # LTSpice Simulations/*.log Simulations/*.raw Simulations/*.txt Copper Layer Stackup: ============================================================= L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains T1 3.200mm 0.1260" (4 holes) T5 15.200mm 0.5984" (1 hole) T3 7.000mm 0.2756" (6 holes) T4 10.000mm 0.3937" (4 holes T5 15.200mm 0.5984" (1 hole Total plated holes unplated through holes: .
- 101.025141 (end 150.75 145.02 (end.
- Normal -8.592839e-01 4.190219e-03 -5.114818e-01 vertex.
- A/Panels/title_test.stl and b/Panels/title_test.stl differ Latest commits for.