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BackFile 'precadsr-panel.drl' contains plated through holes: ============================================================= T1 3.200mm 0.1260" (4 holes) (with 4 slots) T2 5.000mm 0.1969" (1 hole) Total plated holes unplated through holes: merged pull request 'Put title box in PDF export' (#4) from schematic into main ... Finish schematic, add PDF | J6 | 1 | | | | | | J12 | 1 | Conn_01x04 | Pin header 2.54 mm spacing | Tayda | A-1624 or A-2969 | | J1 | 1 | 1uF | Film capacitor | | | | | D1, D2 | 2 From 5082711a9800483ca58d4b1dffec55bdf27856b9 Mon Sep.
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