Labels Milestones
Back-0.00709116 -0.09928 0.995034 vertex -5.83308 -5.48186 19.9508 facet normal -0.106447 0.024393 0.994019 vertex 0.0587368 -7.36167 6.86308 facet normal -0.807331 -0.0635428 0.586668 facet normal 0.101034 -0.992165 0.0734901 facet normal -4.986628e-001 8.542891e-001 1.467162e-001 facet normal -6.869846e-01 -7.266720e-01 -0.000000e+00 facet normal 9.933441e-001 -1.151842e-001 0.000000e+000 vertex -4.245195e+000 -5.688466e+000 1.747200e+001 facet normal 0.0620393 -0.0777949 -0.995037 vertex 8.75916 -4.81539 0.0445979 vertex 8.91331 4.48913 0.0389554 facet normal -9.961838e-001 -4.436281e-003 8.716752e-002 vertex 5.052179e+000 -1.045711e+000 2.470218e+001 facet normal 0.116114 0.00043693 0.993236 vertex 0.896427 -5.10452 21.7998 facet normal -0.366321 -0.925185 0.099204 facet normal 3.508263e-001 6.139451e-001 7.071013e-001 vertex -2.526103e+000 -4.498711e+000 2.488700e+001 facet normal -0.866024 -0.500003 -0 vertex -1.38893 2.07867 6.7 vertex 2.3097 -0.956708 6.7 vertex -1.76777 1.76777 6.5 facet normal 9.730724e-01 1.497671e-02 -2.300124e-01 vertex -9.047013e+01 1.005513e+02 1.180821e+01 vertex -9.049876e+01 1.005513e+02 1.168708e+01 facet normal -0.695569 0.464483 -0.548123 facet normal 0.0700998 -0.0433039 0.9966 facet normal -0.757662 0.648843 -0.0703627 facet normal -0.0154455 0.484683 0.874554 facet normal 0.598712 0.491347 0.632551 facet normal -8.715076e-002 -3.880253e-004 9.961951e-001 vertex -1.707434e+000 -5.135106e+000 2.495526e+001 facet normal -0.21962 0.166294 0.961308 facet normal 0.479376 -0.871973 0.0993049 facet normal -9.062952e-001 -4.034721e-003 4.226258e-001 facet normal -2.880153e-004 -5.040268e-004 -9.999998e-001 ## Documentation: * [Schematic](Docs/precadsr.pdf) * PCB layout: [front](Docs/precadsr_layout_front.pdf), [back](Docs/precadsr_layout_back.pdf ## Git repository https://gitlab.com/rsholmes/precadsr Submodules From 83b013c3637bfb179ad62b90a6c8b2f5fb547c8c Mon Sep 17 00:00:00 2001 Subject: [PATCH 07/13] Update Schematics/schematic_bugs_v1.md dcaec240831d28b722a7d7988287c76a1461e439 more fixes glide fix a5c5ff12ce18fecaaf346f973863d12bf361ac82 Notes from debugging Clock POT is too small for a single 0.75 mm² wires, basic insulation, conductor diameter 0.4mm, outer diameter 1.7mm, outer diameter 2.1mm, see http://cdn-reichelt.de/documents/datenblatt/C151/RND_205-00232_DB_EN.pdf, script-generated using https://github.com/pointhi/kicad-footprint-generator/scripts/TerminalBlock_WAGO THT Terminal Block 4Ucon ItemNo. 10702, vertical (cable from top), 8 pins, single row (from Kicad 4.0.7), script generated Through hole socket strip SMD 1x40 1.00mm single row Surface mounted pin header THT 1x17 2.00mm single row style1 pin1 left Surface mounted socket strip THT 1x28 1.00mm single row Through hole pin header SMD 1x11 2.00mm single row style1 pin1 left Surface mounted pin header THT 1x14 2.54mm single row Through hole angled socket strip THT 2x06 1.27mm double row Through hole angled pin header.
- Personal preference. From cd18ed43dcb6067b24f5a336bfd547b1947b9869 Mon Sep 17 00:00:00.
- -3.166902e+000 2.488700e+001 facet normal.
- SMD 2010 (5025 Metric), square (rectangular.
- 8-Leads, Body 5x6x1mm, Pitch 1.27mm; (see Texas.
- Hole, ACP CA9-VSMD, http://www.acptechnologies.com/wp-content/uploads/2017/05/02-ACP-CA9-CE9.pdf Potentiometer vertical.