Labels Milestones
Back(https://docs.broadcom.com/docs/AV02-0169EN SOIC 1.27 16 12 Wide 16-Lead Plastic Small Outline http://www.vishay.com/docs/49633/sg2098.pdf SOP, 16 Pin (JEDEC MO-241/VAC, https://assets.nexperia.com/documents/package-information/SOT764-1.pdf), generated with kicad-footprint-generator Molex KK 396 Interconnect System, old/engineering part number: 22-27-2081, 8 Pins per row (http://www.molex.com/pdm_docs/sd/428202214_sd.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py WDFN, 8 Pin (https://www.st.com/resource/en/datasheet/lm2903.pdf#page=16), generated with kicad-footprint-generator ipc_noLead_generator.py VLGA, 4 Pin (http://www.ixysic.com/home/pdfs.nsf/www/CPC1017N.pdf/$file/CPC1017N.pdf), generated with.
- 8-lead dip package, row spacing.
- 3.23535 0.378418 18.9636 vertex 3.68021 -0.990711 18.9636.
- Infineon PG-TO-220-7, Tab as Pin 8.