3
1
Back

5a4d5850276107dae545a96ba13aec19af1bdbba Mon Sep 17 00:00:00 2001 Subject: [PATCH] Build images Images/PXL_20210831_000922493.jpg | Bin 0 -> 29479 bytes .../VALMORIFICATION+Build+and+BOM.pdf | Bin rename Futura Heavy BT.ttf | Bin 0 -> 16700 bytes .../Panels/SPIDER CLIMB.png | Bin 0 -> 11692 bytes { "board": { More tweaks after pro review "clearance": 0.2, "diff_pair_gap": 0.25, "diff_pair_via_gap": 0.25, "diff_pair_width": 0.2, "line_style": 0, "microvia_diameter": 0.3, "microvia_drill": 0.1, "name": "Default", "pcb_color": "rgba(0, 0, 0, 0.000)", "track_width": 0.25, "via_diameter": 0.8, "via_drill": 0.4, More tweaks after pro review "extra_units": "error", "global_label_dangling": "warning", "hier_label_mismatch": "error", "label_dangling": "error", "lib_symbol_issues": "warning", More tweaks after pro review "different_unit_footprint": "error", "different_unit_net": "error", "duplicate_reference": "error", "duplicate_sheet_names": "error", More tweaks after pro review "extra_units": "error", "global_label_dangling": "warning", "hier_label_mismatch": "error", "label_dangling": "error", "lib_symbol_issues": "warning", More tweaks after pro review } ], "meta": { More tweaks after pro review More tweaks after pro review 19116ba39d Apply jlcpcb's design rules, small fixes for those couple more minor clearance tweaks couple more minor clearance tweaks couple more GND-stitch vias Undo converting GND to GND_JMP and fix everything that broke created pull request synth_mages/MK_VCO#3 From 3d0ca7fdf6e2ad8d7864221e585c668e46544055 Mon Sep 17 00:00:00 2001 Subject: [PATCH] Put title box in PDF export Put title box in PDF export Merge pull request 'Put title box in PDF export' (#4) from schematic into main Merge pull request 'Fix rail clearance issues, make all power traces large "rules": { PCB initial layout, no traces "other_line_width": 0.15.

New Pull Request