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BackEmacs temps *~ \#* # LTSpice Simulations/*.log Simulations/*.raw Simulations/*.txt Copper Layer Stackup: ============================================================= L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains T1 3.200mm 0.1260" (4 holes) (with 4 slots) T2 5.000mm 0.1969" (1 hole Total plated holes count 16 Not plated through holes: unplated through holes: unplated through holes: ============================================================= T1 3.200mm 0.1260" (4 holes) (with 4 slots) T2 5.000mm 0.1969" (1 hole) Total plated holes count 16 ============================================================= Total unplated holes count 16 Not plated through holes: unplated through holes: unplated through holes: ============================================================= From a22bca6d29ddc0a54597dab4d11ad9ab7e48e3c6 Mon Sep 17 00:00:00 2001 .../Panels/MAGIC MOUTH.png | Bin 0 -> 43300 bytes Panels/FireballSpell_Large_bw.xcf | Bin 12821 -> 0 bytes Latest commits for file Schematics/SynthMages.pretty/Pushbutton Switch (PBS105).kicad_mod Normal file Unescape Hardware/PCB/precadsr/precadsr.pro.
- Couple more GND-stitch vias From 77735c00cc3285131373f5cfc61b82eab5963d12.
- -0.431314 6.95641 vertex 7.37107 -0.303284.