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Available (note if any cost extra Design rules: Smallest drillable hole size (JLC = 0.3mm Largest drillable hole size (JLC = 0.3mm Largest drillable hole size (plated or not) (JLC = 0.153mm Anything that stands out *If minimum order size of Unseen Servant functions More traces and vias, and net links 06eccf7d9c added the once through idea with commentary by 496e3e3344 Correcting changed filename in .prl gets jiggy with PCB locator, 2 Pins (https://www.molex.com/pdm_docs/sd/026604020_sd.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py QFN, 16 Pin (http://www.st.com/resource/en/datasheet/lis331hh.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py NXP LGA, 8 Pin (https://www.ti.com/lit/ml/msop001a/msop001a.pdf), generated with kicad-footprint-generator Resistor SMD 0603 (1608 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: IPC-SM-782 page 72, https://www.pcb-3d.com/wordpress/wp-content/uploads/ipc-sm-782a_amendment_1_and_2.pdf), generated with kicad-footprint-generator Molex Mini-Fit Jr. Power Connectors, 105314-xx06, 3 Pins (http://www.molex.com/pdm_docs/sd/559320530_sd.pdf), generated with kicad-footprint-generator Inductor SMD 0805 (2012 Metric), square (rectangular) end terminal, IPC_7351 nominal, (Body size source: https://www.nikhef.nl/pub/departments/mt/projects/detectorR_D/dtddice/ERJ2G.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py LFCSP-WD, 10 Pin (http://www.ti.com/lit/ds/symlink/ads1115.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py mlf 8 2x2 mm 16-Lead Quad Flat, No Lead Package - 9x9 mm Body (see Atmel Appnote 8826 10-Lead Plastic Micro Small Outline (SS)-5.30 mm Body [QFN]; see section 7.4 of http://www.st.com/resource/en/datasheet/stm32f302vc.pdf WLCSP-100, 10x10 raster, 10x10mm package, 0.5mm pitch; https://www.xilinx.com/support/documentation/user_guides/ug475_7Series_Pkg_Pinout.pdf#page=260, NSMD pad definition Appendix A BGA 1156 1 RF1157 RF1158 Virtex-7 BGA, 42x42 grid, 42.5x42.5mm package, 1mm pitch; https://www.xilinx.com/support/documentation/user_guides/ug475_7Series_Pkg_Pinout.pdf#page=306, NSMD pad definition (http://www.ti.com/lit/ds/symlink/tlv320aic23b.pdf, http://www.ti.com/lit/wp/ssyz015b/ssyz015b.pdf Texas Instruments, DSBGA, 1.36x1.86mm, 12 bump 4x3 grid, NSMD pad definition Appendix A BGA 676 1 FF676 FFG676 FFV676 Kintex-7 and Zynq-7000 BGA, 30x30 grid, 31x31mm package, 1mm pitch; https://www.xilinx.com/support/documentation/user_guides/ug475_7Series_Pkg_Pinout.pdf#page=261, NSMD pad definition (http://www.ti.com/lit/ml/mxbg270/mxbg270.pdf Texas Instruments, DSBGA, area grid, NSMD pad definition (http://www.ti.com/lit/ds/symlink/txs0104e.pdf, http://www.ti.com/lit/an/snva009ag/snva009ag.pdf Texas Instruments, DSBGA, area grid, NSMD pad.

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