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"specctra_dsn": "", "step": "", "vrml": "" }, "page_layout_descr_file": "" }, "schematic": { "annotate_start_num": 0, "drawing": { More tweaks after pro review "spice_external_command": "spice \"%I\"", More tweaks after pro review More tweaks after pro review "clearance": 0.2, "diff_pair_gap": 0.25, "diff_pair_via_gap": 0.25, "diff_pair_width": 0.2, "line_style": 0, "microvia_diameter": 0.3, "microvia_drill": 0.1, "name": "Default", "pcb_color": "rgba(0, 0, 0, 0.000)", "schematic_color": "rgba(0, 0, 0, 0.000)", "track_width": 0.25, "via_diameter": 0.8, "via_drill": 0.4, More tweaks after pro review Apply jlcpcb's design rules, small fixes for those 972e45fb78 Go to file db7d02719b Find and replace last few thin traces, fix teardrops and gnd fill f63cfba954 Embiggen traces, add teardrops updated C5 footprint & tracing; schematic annotation updates the potentiometer pads and trace routing to de-bodge the pots. Updates the potentiometer.

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