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BackBin 36336 -> 0 bytes From bada0399ca1e4fb2dd01b4ec5312596f167b34e1 Mon Sep 17 00:00:00 2001 Subject: [PATCH] PCB initial layout, no traces Initial kicad, images, gitignore for kicad backups afea9d5a2c Final revision; added custom DRC as project file c4e1c30b9b Add jlc constraints DRC; replace order number text Compare 19 commits » created pull request 'new_footprints' (#5) from new_footprints into main 26b0f01955 Fix for two bugs in Doghouse Diaries rss: spaces in img src and quotes in alt/title text under images (extra useful for non-browser users) Clean up code formatting; added a few mm further from the ages 2 5mm LEDs Latest commits for file Schematics/SynthMages.pretty/Potentiometer_Alpha_RD901F-40-00D_Single_Vertical_CircularHoles_Shaft_Centered.kicad_mod Latest commits for file Schematics/LUTHERS_VCO.diy Update luther's layout Drill report for precadsr-panel.kicad_pcb Created on Tue Mar 5 20:19:51 2024 Copper Layer Stackup: ============================================================= L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains T1 3.200mm 0.1260" (4 holes) T5 15.200mm 0.5984" (1 hole) T3 7.000mm 0.2756" (6 holes) T4 10.000mm 0.3937" (4 holes T5 15.200mm 0.5984" (1 hole T3 7.000mm 0.2756" (6 holes T4 10.000mm 0.3937" (4 holes) (with 4 slots) T2 5.000mm 0.1969" (1 hole) Total plated holes Total unplated holes count 16 Latest commits for.
- X Package Style M236 TO-50-4.
- -7.825419e-002 -9.969335e-001 0.000000e+000 vertex -4.455791e+000 3.434344e+000 2.496000e+001 vertex.
- R18, R26 | 3 | 2N3904 | 0.2A.