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BackReplace last few thin traces, fix teardrops and gnd fill Embiggen traces, add teardrops updated C5 footprint & tracing; schematic annotation Add 55k-ish resistor to coarse knob to fix tuning range 's notes on repique/caixa, two or three for surdos Add schematic, start on PCB with exploratory 8hp layout Bring in diylc and openscad design Bring in diylc and openscad design ## Mechanical assembly Documentation # ---> KiCad # For PCBs designed using KiCad: http://www.kicad-pcb.org/ # Format documentation: https://kicad.org/help/file-formats/ # Temporary files *.lck # KiCad backups folders *-backups # Compressed files *.zip # Mac stuff *.DS_Store # Emacs temps *~ \#* # LTSpice Simulations/*.log Simulations/*.raw Simulations/*.txt Copper Layer Stackup: ============================================================= L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains plated through holes: ============================================================= T1 3.200mm 0.1260" (4 holes) (with 4 slots) T2 5.000mm 0.1969" (1 hole) T3 7.000mm 0.2756" (6 holes T4 10.000mm 0.3937" (4 holes) (with 4 slots) T2 5.000mm 0.1969" (1 hole) T3 7.000mm 0.2756" (6 holes) T4 10.000mm 0.3937" (4 holes T5 15.200mm 0.5984" (1 hole) Total plated holes count 16 ============================================================= Total unplated holes count 16 Not plated through holes: unplated through holes: unplated through holes: ============================================================= e49f4ab127dc081ee1c77dd21e80d128628a1152 2d3c489f2acf0f8bdc9cf0fe8c2346d4d07472be More SR1 notation ec67859b1c2779470b99801ce69f8850b83fa3e1 Start of LM13700 version to see why 53c90c58d8 move bugs to md file to be fixed elsewhere Schematics/Enlarge/Enlarge.kicad_sch | 206 Update README.md 2cb8e5eaf679e30139948d8744800b04487466fc updated C5 footprint & tracing; schematic annotation updated C5 footprint & tracing; schematic annotation Add 55k-ish resistor to coarse knob to fix tuning range 46614f2341648d9e7aca030956f927a05eca802c New Pull Request