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Power subsystem Checkpoint after fixes but before shrinking boards Checkpoint after converting most things to SMD From 054c37512afd84e9f4dd43316902a76ae73fd917 Mon Sep 17 00:00:00 2001 Subject: [PATCH] Add notes about UX component wiring 2x Sockets, all three pins need wires: glide in (sleeve and normal both GND 6x Sockets, 2pin: Gate out (could normal to TP10, optional) - Casc out 2x Toggle Switches, 2pin: - all step switches (all go to same bus run/stop 2x Pushbutton switches, all 2pin: - reset in - RESET / CASCADE out - CLK out - CLK out - Gate out (could normal to TP10, optional) - Casc out 2x Toggle Switches, 2pin: all step switches (all go to same bus run/stop 2x Pushbutton switches, all 2pin: - step - reset Pots, 3-pin: Glide attenuator (B10k) (join two left pins from below Clock POT is the license create a serrating effect for better grip on the cylindrical edge of a Secondary License (if permitted under the terms of Sections 1 and 10 steps based on http://www.latticesemi.com/view_document?document_id=213 Lattice caBGA-756, ECP5 FPGAs, 27.0x27.0mm, 756 Ball, 32x32 Layout, 0.8mm Pitch, https://www.st.com/resource/en/datasheet/stm32mp151a.pdf ST UFBGA-73, 5.0x5.0mm, 73 Ball, 9x9 Layout, 0.5mm Pitch, https://www.st.com/resource/en/datasheet/stm32mp151a.pdf ST LFBGA-448, 18.0x18.0mm, 448 Ball, 22x22 Layout, 0.8mm Pitch, https://www.infineon.com/cms/en/product/packages/PG-LFBGA/PG-LFBGA-292-11/ LFBGA-100, 10x10 raster, 9x9mm package, pitch 0.4mm; see section 7.5 of http://www.st.com/resource/en/datasheet/stm32l152ze.pdf WLCSP-143, 11x13 raster, 4.539x5.849mm package, pitch 0.4mm pad, 15x15mm, 289 Ball, 17x17 Layout, 0.5mm Pitch, https://www.st.com/resource/en/datasheet/stm32g473pb.pdf ST UFBGA-129, 7.0x7.0mm, 129 Ball, 13x13 Layout, 0.5mm Pitch, https://www.diodes.com/assets/Datasheets/AP22913.pdf WLCSP-4, 0.64x0.64mm, 4 Ball, 2x2 Layout, 0.5mm Pitch, http://www.ti.com/lit/ds/symlink/ts3a24159.pdf Texas Instruments, DSBGA, 3.33x3.488x0.625mm, 49 ball 7x7 area grid, NSMD, YZP0005 pad definition, 0.95x1.488mm, 6 Ball, 2x3 Layout, 0.35mm Pitch, https://www.ti.com/lit/ml/mxbg383/mxbg383.pdf, https://www.ti.com/lit/ds/symlink/tps62800.pdf Texas Instruments, DSBGA, area grid, YBG pad definition, 0.95x1.488mm, 6 Ball, 2x3 Layout, 0.5mm Pitch, https://www.ti.com/lit/ds/symlink/dac80508.pdf Analog LFCSP, 16 Pin (https://www.ti.com/lit/ml/msop002a/msop002a.pdf), generated with kicad-footprint-generator Capacitor SMD Kemet-C (6032-28 Metric), IPC_7351 nominal, (Body size source: https://www.vishay.com/docs/20019/rcwe.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py.

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