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BackFolders temp_* # Compressed files *.zip # Mac stuff *.DS_Store # Emacs temps *~ \#* # LTSpice Simulations/*.log Simulations/*.raw Simulations/*.txt Copper Layer Stackup: ============================================================= L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains plated through holes are merged with plated holes Total unplated holes count 16.
- Vertex -4.25586 4.81447 7.51797 vertex 4.78188 4.20094.
- 2.07867 6.7 vertex 0.956708 2.3097 6.5.
- 3.002652e-001 -5.143612e-001 8.032891e-001 vertex -5.153117e+000 2.914987e+000.