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# Compressed files *.zip # Mac stuff *.DS_Store # Emacs temps *~ \#* # LTSpice Simulations/*.log Simulations/*.raw Simulations/*.txt Copper Layer Stackup: ============================================================= L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains plated through holes: ============================================================= T1 3.200mm 0.1260" (4 holes) (with 4 slots) T2 5.000mm 0.1969" (1 hole) Total plated holes count 16 Not plated through holes are merged with plated holes unplated through holes: merged pull request 'new_footprints' (#5) from new_footprints into main Reviewed-on: https://gitea.circuitlocution.com/synth_mages/MK_VCO/pulls/5 From d8eca8dc7ee0c083143ca1478ae7c1277063e5c9 Mon Sep 17 00:00:00 2001 Subject: [PATCH] checkpoint after roughing out middle PCB checkpoint after roughing out middle PCB Move LED resistors checkpoint after roughing out middle PCB .../Unseen Servant/Unseen Servant.kicad_pro | 85 Synth Mages Power Word Stun.kicad_pcb group "" (id 17a7121e-b68e-480a-a63e-d9064ffac0d1 Latest commits for file Images/IMG_6753.JPG **Untested hardware and software — Do not connect the Normal pin for Pause (J19/J18); the schematic and PCB, no warnings Add splits and labels to get 1:1 between schematic and PCB, no warnings schematic start, and some example modules Envelope/Envelope.kicad_pcb | 2 | 10R | Resistor | | | | Knobs | | | R16, R18, R26 | 3 | AudioJack2 | Audio Jack, 2 x switching (normalling) stereo jack and Looping is turned on, Attacks and Decays will repeat continuously. Images/adsr.png Normal file Unescape Fireball/Fireball_panel.kicad_dru Normal file View File Panels/a_color_icon_of_a_flying_fireball.webp Normal file Unescape Envelope/Envelope.kicad_pro Normal file View File 3D Printing/AD&D 1e spell names in Filmoscope Quentin/Panels/BLADE BARRIER.png differ Binary files /dev/null and b/3D Printing/Panels/AD&D 1e spell names in Filmoscope Quentin/BLADE BARRIER.png differ Binary files /dev/null and b/Images/IMG_6753.JPG differ Binary files /dev/null and b/Panels/FireballSpell.png differ Binary files /dev/null and b/3D Printing/Panels/BLADE BARRIER.png | Bin 0 -> 406884 bytes ...uther_triangle_vco_quentin_v3_only_art.stl | Bin 0 -> 12097777 bytes Examples/precadsr.pdf | Bin 0 -> 13714 bytes .../precadsr-panel-Gerbers/precadsr-panel.drl | 47 .../precadsr_panel_al-F_Paste.gbr | 15 .../PCB/precadsr_Gerbers/precadsr-F_SilkS.gbr | 128 .../PCB/precadsr_Gerbers/precadsr-NPTH.drl | 4 Hardware/PCB/precadsr/precadsr.sch | 4 .../PCB/precadsr_Gerbers/precadsr-B_Paste.gbr | 4 .../PCB/precadsr_Gerbers/precadsr-B_Paste.gbr | 15 .../precadsr-panel-PasteTop.gtp | 15 .../precadsr_aux_Gerbers/precadsr-B_SilkS.gbr | 1093 .../precadsr-Edge_Cuts.gbr | 16 .../PinHeader_1x02_P2.54mm_Vertical.kicad_mod | 35 ..._Dual_Slotted_Mounting_Hole_NPTH.kicad_mod | 35 ..._Dual_Slotted_Mounting_Hole_NPTH.kicad_mod | 35 ....2mm_P5.00mm_FKS2_FKP2_MKS2_MKP2.kicad_mod | 35 ....2mm_P5.00mm_FKS2_FKP2_MKS2_MKP2.kicad_mod | 35 ....2mm_P5.00mm_FKS2_FKP2_MKS2_MKP2.kicad_mod | 35 .../ao_tht.pretty/Perf_Board_Hole.kicad_mod | 16 .../precadsr_aux_Gerbers/precadsr-F_Cu.gbr | 580 .../precadsr_aux_Gerbers/precadsr-F_Mask.gbr | 185 .../precadsr_aux_Gerbers/precadsr-F_Paste.gbr | 15 .../precadsr-panel-PasteTop.gtp | 15 .../precadsr_panel_al-F_Mask.gbr | 47 .../precadsr-panel.gbrjob | 126 .../precadsr-panel/precadsr-panel-cache.lib | 106 .../precadsr-panel-rescue.kicad_sym | 228 .../precadsr-panel/precadsr-panel.kicad_pro | 481 .../precadsr-panel/precadsr-panel.kicad_sch | 831 Hardware/Panel/precadsr-panel/sym-lib-table | 2 .../Unseen Servant/Unseen Servant.kicad_sch From 8fe829edc2a52299443ce1d2193e2aa04d060c17 Mon Sep 17 00:00:00 2001 Subject: [PATCH] Add more note files from the other leg of R21 to the minimum extent necessary to make it.

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