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Href="https://gitea.circuitlocution.com/synth_mages/MK_VCO/commit/2cb8e5eaf679e30139948d8744800b04487466fc">2cb8e5eaf679e30139948d8744800b04487466fc updated C5 footprint & tracing; schematic annotation updates the potentiometer pads and thermal vias; see figure 8.2 of https://www.silabs.com/documents/public/data-sheets/efm8bb1-datasheet.pdf 20-Lead Plastic Quad Flatpack (PH) - 16x16x1 mm Body, 2.00 mm [TQFP] (see Microchip Packaging Specification 00000049BS.pdf 80-Lead Plastic Thin Quad Flatpack (PT) - 10x10x1 mm Body, 2.00 mm Footprint [TQFP] (see Microchip Packaging Specification 00000049BS.pdf HSOP, 8 Pin (https://www.jedec.org/sites/default/files/docs/MO-193D.pdf variant AB), generated with kicad-footprint-generator JST XA series connector, B7B-EH-A (http://www.jst-mfg.com/product/pdf/eng/eEH.pdf), generated with kicad-footprint-generator Hirose DF13 through hole, DF13-03P-1.25DSA, 3 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator ipc_gullwing_generator.py Infineon PG-DSO 12 pin, exposed pad: 4.5x8.1mm, (https://www.infineon.com/cms/en/product/packages/PG-DSO/PG-DSO-12-9/ Infineon PG-DSO 12 pin.

0.0817958 -0.0819182 -0.993277 vertex 2.95564 4.03376.
/VCA/commit/77735c00cc3285131373f5cfc61b82eab5963d12">77735c00cc3285131373f5cfc61b82eab5963d12 Update README.md 3d0ca7fdf6e2ad8d7864221e585c668e46544055 Update README.md

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