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From 054c37512afd84e9f4dd43316902a76ae73fd917 Mon Sep 17 00:00:00 2001 Subject: [PATCH 07/13] Update Schematics/schematic_bugs_v1.md more fixes more fixes - Gate Out - 1K to TP5 - Gate out (could normal to Reset In socket - Reset Socket to U3-3 = capacitor measurement roughly 15nF (has a resistor footprint between +12V and Reset In - ~27K to U3-8? No, transistors maybe activate? Outs: Clock Out - 1K to U2-14 Case Out - 1K to TP5 - Gate out (could normal to Reset In Pause CV In Latest.

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