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Back1) (precision 4)) From 972d8b1e0797912e848110b19e1af10ed411bbbb Mon Sep 17 00:00:00 2001 Subject: [PATCH] submodule doc From 13c8bcac477b612d33e1b1cfe89a6f9adc0a8935 Mon Sep 17 00:00:00 2001 Subject: [PATCH] Change transistor footprint to inline_wide, fix DRC ground plane Updates from real TL0x4s Merge pull request 'Put title box in PDF export' (#4) from schematic into main Merge pull request 'new_footprints' (#5) from new_footprints into main ... Footprint "SOCKET_3_PIN_HEADER_NORMAL" (version 20211014) (generator pcbnew Latest commits for branch schematic Merge pull request 'Put title box in PDF export' (#4) from schematic by Eeschema 5.1.10-88a1d61d58~88~ubuntu20.04.1 **Component Count:** 77 **Component Count:** 75 0 0 Y N 1 F N DEF SW_SPST_LED SW 0 0 N N 1 F N DEF 2_pin_Molex_header J 0 40 N N 1 F N DEF Graphic GRAF 0 40 Y Y 1 F N DEF SW_SP3T SW 0 40 Y N 1 F N DEF 2_pin_Molex_header J 0 40 Y N 1 F N DEF Graphic GRAF 0 40 Y N 1 F N DEF SW_MEC_5G_LED SW 0 0 Y N 1 F N DEF SW_DIP_x06 SW 0 0 N Y 1 F N DEF SW_SPDT_MSM SW 0 0 Y N 1 F N DEF SW_DPDT_x2 SW 0 20 Y N 2 F N DEF SW_DIP_x05 SW 0 0 Y N 1 F N DEF SW_MEC_5G_LED SW 0 40 Y N 1 F N DEF SW_NKK_GW12LJPCF SW 0 0 Y N 1 F N DEF SW_NKK_GW12LJPCF SW 0 40 Y N 1 F N DEF SW_DIP_x06 SW 0 1 Y Y 1 F N DEF Graphic GRAF 0 40 Y N.
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