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Copper Layer Stackup: ============================================================= L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains T1 3.200mm 0.1260" (4 holes) T5 15.200mm 0.5984" (1 hole Total plated holes unplated through holes: unplated through holes: merged pull request 'Put title box in PDF export' (#4) from schematic by Eeschema 5.1.10-88a1d61d58~90~ubuntu20.04.1 **Component Count.

• TMRxxxxWI Single/Dual_output DCDC-Converter, TRACO, TMR 1-xxxx, Single output.
• (j18/j19 // 1 for.

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