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BackSchematics/SynthMages.pretty/6.3mm_NPTH_MAXJLCPCB.kicad_mod Normal file View File Schematics/Baby8_Part4_Cascading.pdf Normal file View File main precadsr/.gitignore 58 lines # Temporary files *.000 *.bak *.bck *.zip *.DS_Store *~ .gitignore-extra *.dsn *.kicad_pcb-bak *.kicad_sch-bak *-backups *.kicad_prl *.sch-bak *~ _autosave-* *.tmp *-save.pro *-save.kicad_pcb fp-info-cache # Netlist files (exported from Pcbnew # Exported BOM files *.xml *.csv Schematics/OttosIrresistableDance/KickDrum.kicad_sch Normal file Unescape Schematics/SynthMages.pretty/Jack_3.5mm_QingPu_WQP-PJ398SM_Vertical_CircularHoles_Socket_Centered.kicad_mod Normal file View File 3D Printing/Cases/Eurorack Modular Case/20210926_092011.jpg Executable file View File Latest commits for file Panels/luther_triangle_vco_quentin_v3_only_art.stl The selected branch/tag are equal. From c58f541d7e93b3fa0676ab29736db865cc42ef96 Mon Sep 17 00:00:00 2001 Subject: [PATCH] Add polygon calculation for wing plates 3e868f13c4 Go to file 55ee65a5e9 Checkpoint after tweaking footprints some more, starting over at 14hp cd18ed43dc Added hard sync to schematic, laid out PCB with exploratory 8hp layout Add schematic, start on PCB with exploratory 8hp layout Bring in diylc and openscad design ## Mechanical assembly Documentation # ---> KiCad # For PCBs designed using KiCad: https://www.kicad.org/ # Format documentation: http://kicad-pcb.org/help/file-formats/ # KiCad backups folders *-backups # Compressed files *.zip # Mac stuff *.DS_Store # Emacs temps *~ \#* # LTSpice Simulations/*.log Simulations/*.raw Simulations/*.txt Copper Layer Stackup: ============================================================= L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains T1 3.200mm 0.1260" (4 holes) T5 15.200mm 0.5984" (1 hole Total plated holes unplated through holes: ============================================================= T1 3.200mm 0.1260" (4 holes) (with 4 slots) T2 5.000mm 0.1969" (1 hole) Total plated holes count 16 Not plated through holes are merged with plated holes count 0 Minor layout tweaks Based on designs from: Skull & Circuits (https://www.skullandcircuits.com/vca-1-2/ - Moritz Klein (and derivatives Fix rail clearance issues, make all power traces large "rules": { PCB initial layout, no traces "silk_line_width": 0.15, PCB initial layout, no traces PCB initial layout, no traces One SPST switch per step, to enable/disable gate per step. (10 One multi-pole rotary switch - number of pins: 15; pin pitch: 7.50mm; Angled || order number: 1766330 12A 630V Generic Phoenix Contact connector footprint for: MC_1,5/9-GF-3.5; number of pins: 13; pin pitch: 5.08mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST 2.2x4.5 C or ISO 7049-ST 2.2x6.5 C (http://www.fasteners.eu/standards/ISO/7049/) || order number: 1806245 12A 630V Generic Phoenix Contact connector footprint for: MCV_1,5/10-GF-3.5; number of pins: 06; pin pitch: 7.62mm; Angled || order number: 1777196 12A Generic Phoenix Contact connector footprint for: MCV_1,5/10-G-3.5; number of pins: 08; pin pitch: 5.08mm; Angled; threaded flange; footprint includes mount hole for mounting screw: ISO 1481-ST.
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