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18.2651 facet normal -1.800811e-001 3.061249e-001 9.348039e-001 facet normal 2.823787e-15 -1.000000e+00 1.114886e-14 facet normal -0.338932 0.181159 0.923205 vertex 7.50438 4.96056 3.82299 facet normal 0.247465 -0.963808 0.0991679 vertex 3.09017 -9.51056 0 facet normal 9.575356e-16 -1.000000e+00 1.030694e-14 facet normal -6.727982e-001 7.398260e-001 0.000000e+000 vertex -1.397929e+000 -6.975894e+000 2.496000e+001 vertex -4.873291e+000 -2.885563e+000 2.496000e+001 vertex 2.937280e+000 6.404036e+000 9.983999e+000 vertex 6.528279e+000 2.738236e+000 1.747200e+001 facet normal 0.292521 0.954699 0.0546087 facet normal -8.401793e-02 9.964642e-01 3.547643e-04 vertex -9.858924e+01 1.059924e+02 3.455000e+01 facet normal 4.064201e-001 7.112353e-001 5.735565e-001 vertex -1.615734e+000 -4.974631e+000 2.484855e+001 facet normal -0.471406 -0.881916 0 facet normal -0.705391 0.0694748 0.705406 facet normal -0.584942 -0.804991 0.0991595 facet normal -4.949282e-001 -8.661245e-001 6.981780e-002 facet normal -0.028589 -0.0942412 0.995139 vertex 7.3758 1.46714 6.0001 facet normal -0.768509 0.630625 0.108196 facet normal 0.56635 0.39288 0.724495 facet normal 0.920058 -0.090613 0.38116 vertex 9.96384 0 2.94279 vertex -9.91954 -1.97312 2.58057 facet normal -3.333789e-001 -5.830855e-001 7.408574e-001 vertex -5.567250e-003 5.889094e+000 2.488918e+001 facet normal 0.0568312 0.0727061 0.995733 vertex 7.13918 0.0610838 6.87866 vertex 0 7.49999 6.0001 vertex -2.87013 -6.92908 6.0001 vertex 6.23601 4.16678 6.0001 vertex 4.16677 6.23601 6.0001 vertex 2.87012 6.92909 6.0001 vertex -7.35588 1.46317 6.0001 vertex 7.49999 0 6.0001 facet normal -0.881923 0.471394 0 vertex 10.1904 0 0 Y N 1 F N DEF SW_Push_LED SW 0 0 Y N 1 F N DEF 3_pin_Molex_connector J 0 40 Y N 1 F N DEF SW_DPDT_x2 SW 0 40 Y N 1 F N DEF SW_DIP_x06 SW 0 40 Y N 1 F N DEF SW_Reed_SPDT SW 0 0 N Y 1 F N DEF SW_DIP_x01 SW 0 0 Y N 1 F N DEF SW_Push SW 0 0 Yet more ways of pulling comics, alt text and salient bits of blogs into Tiny Tiny RSS entries. # For PCBs designed using KiCad: https://www.kicad.org/ # Format documentation: http://kicad-pcb.org/help/file-formats/ # KiCad backups folders *-backups # Compressed files *.zip # Mac stuff *.DS_Store # Emacs temps *~ \#* # LTSpice Simulations/*.log Simulations/*.raw Simulations/*.txt Copper Layer Stackup: ============================================================= L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains plated through holes: ============================================================= T1 3.200mm 0.1260" (4 holes) (with 4 slots) T2 5.000mm 0.1969" (1 hole) Total plated holes count 0 Hardware/Panel/precadsr-panel-Gerbers/precadsr-panel-CmtUser.gbr Normal file.

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