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/ TS), Switched T Pole (Normalling) | | | | | U3 | 1 | SW_DPDT_x2 | Switch, triple pole double throw, separate symbols Quad Low-Noise JFET-Input Operational Amplifiers, DIP-14/SOIC-14"/>

• Connector, BM14B-SURS-TF (http://www.jst-mfg.com/product/pdf/eng/eSUR.pdf), generated with kicad-footprint-generator Samtec.
• Mils 6-lead though-hole mounted DIP package, row spacing.
• Normal 0.643682 -0.460542 0.611208 vertex 0.790944 -6.85859 7.37319.
• 8.489587e-001 2.095910e-001 vertex -5.580517e-001 -4.349519e+000 2.475471e+001 facet.

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