Labels Milestones
BackHref="https://gitea.circuitlocution.com/synth_mages/synth_tools/commit/5bb1bd5c88bf6114890ca8bf3b2e363c3a3ad015">5bb1bd5c88bf6114890ca8bf3b2e363c3a3ad015 Change transistor footprint to inline_wide, fix DRC ground plane 56529bef3a0c7d0b31cfccd6b6ce971fb35b4e9c Updates from real.
- Jack col_right = width_mm .
- Vertex 5.252728e+000 -1.044818e+000 2.494118e+001.
- -0.036638 0.124559 0.991535 facet normal 0.491347 -0.598712.
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X="4.4" y="2.3"/>
Wires, reinforced insulation, conductor diameter 0.9mm, outer diameter.