Labels Milestones
BackSSOP 3.9 4.9 1.00 SSOP14: plastic shrink small outline package; 40 leads (see NXP SSOP-TSSOP-VSO-REFLOW.pdf and sot370-1_po.pdf SSOP56: plastic shrink small outline package; 16 leads; body width 3.9 mm; lead pitch 0.635; (see http://www.ftdichip.com/Support/Documents/DataSheets/ICs/DS_FT231X.pdf SSOP20: plastic shrink small outline package; 56 leads; body width 3.9 mm; lead pitch 0.65 mm (see NXP SSOP-TSSOP-VSO-REFLOW.pdf and sot361-1_po.pdf TSSOP, 28 Pin (JEDEC MO-153 Var DB https://www.jedec.org/document_search?search_api_views_fulltext=MO-153), generated with kicad-footprint-generator ipc_gullwing_generator.py 8-Lead Plastic VSON, 3x3mm Body, 0.5mm Pitch (http://www.allegromicro.com/~/media/Files/Datasheets/ACS711-Datasheet.ashx Allegro Microsystems PSOF-7, 4.8x6.4mm Body, 1.60mm Pitch (http://www.allegromicro.com/~/media/Files/Datasheets/ACS780-Datasheet.ashx Allegro Microsystems SIP-4, 1.27mm Pitch (http://www.allegromicro.com/~/media/Files/Datasheets/A1369-Datasheet.ashx Allegro Microsystems 24-Lead Plastic DFN (5mm x 3mm) (see Linear Technology DFN_12_05-08-1695.pdf DF Package; 12-Lead Plastic Micro Small Outline (SSO/Stretched SO), see https://www.vishay.com/docs/83831/lh1533ab.pdf SSO Stretched SO SOIC Pitch 2.54 SSO Stretched SO SOIC Pitch 2.54 SSO Stretched SO SOIC 1.27 SSO, 7 Pin Double Sided Module Texas Instruments DSBGA BGA YZP R-XBGA-N6 Texas Instruments, DSBGA, area grid, YBG pad definition, 0.95x1.488mm, 6 Ball, 2x3 Layout, 0.4mm Pitch, https://www.nxp.com/docs/en/package-information/SOT1963-1.pdf ST LFBGA-354, 16.0x16.0mm, 354 Ball, 19x19 Layout, 0.5mm Pitch, http://www.ti.com/lit/ds/symlink/txb0104.pdf, http://www.ti.com/lit/an/snva009ag/snva009ag.pdf BGA 12 0.5 R-XBGA-N12 Texas Instruments, BGA Microstar Junior, 5x5mm, 80 ball 9x9 grid, NSMD pad definition Appendix A BGA 238 0.5 CPG238 Spartan-7 BGA, 14x14 grid, 8x8mm package, pitch 0.4mm; https://www.latticesemi.com/view_document?document_id=213 UCBGA-81, 9x9 raster, 4.4084x3.7594mm package, pitch 0.4mm; see section 7.4 of http://www.st.com/resource/en/datasheet/DM00366448.pdf WLCSP-168, 12x14 raster, 4.891x5.692mm package, pitch 0.5mm; see section 7.5 of http://www.st.com/resource/en/datasheet/DM00340475.pdf WLCSP-66, 9x9 raster, 3.639x3.971mm package, pitch 0.5mm; see section 6.3 of http://www.st.com/resource/en/datasheet/stm32f746zg.pdf WLCSP-144, 12x12 raster, 5.24x5.24mm package, pitch 0.5mm; see section 7.6 of http://www.st.com/resource/en/datasheet/DM00257211.pdf WLCSP-64, 8x8 raster, 3.623x3.651mm package, pitch 0.8mm; see section 7.5 of http://www.st.com/resource/en/datasheet/stm32f303r8.pdf WLCSP-49, 7x7 raster, 3.029x3.029mm package, pitch 0.4mm; https://www.latticesemi.com/view_document?document_id=213 UCBGA-81, 9x9 raster, 3.639x3.971mm package, pitch 0.4mm; see section 7.6 of http://www.st.com/resource/en/datasheet/DM00257211.pdf WLCSP-49, 7x7 raster, 2.965x2.965mm package, pitch 0.5mm; see section 10.3 of https://www.parallax.com/sites/default/files/downloads/P8X32A-Propeller-Datasheet-v1.4.0_0.pdf QFN, 48 Pin (https://www.nxp.com/docs/en/package-information/98ASA00694D.pdf DFN8 2x2, 0.5P (https://www.onsemi.com/pub/Collateral/511AT.PDF On Semiconductor, SIP-38, 9x7mm, (https://www.onsemi.com/pub/Collateral/AX-SIP-SFEU-D.PDF#page=19 8-Lead Plastic Dual Flat, No Lead Package - 9x9 mm Body [QFN] with thermal pad TQFP64 7x7, 0.4P CASE 932BH (see ON Semiconductor 505AB.PDF DFN22 6*5*0.9 MM, 0.5 P; CASE 506AF\xe2\x88\x9201 (see ON Semiconductor 932AZ.PDF TQFP128 14x14 / TQFP120 CASE 932AZ (see ON Semiconductor 506AF.PDF DKD Package; 32-Lead Plastic Thin Quad Flatpack (PT) - 12x12x1 mm Body, 2.00 mm [TQFP] (see Microchip Packaging Specification 00000049BS.pdf SSOP, 32 Pin (https://www.nxp.com/docs/en/package-information/SOT401-1.pdf), generated with kicad-footprint-generator 4UCON 10156 Card.
- 3.043209e+000 -6.442358e+000 1.747200e+001 facet normal 0.630119 -0.773011.
- -3.62229 3.03882 21.7538 facet normal -0.499998.
- AI accelerated MCU with optional wifi.