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74084 bytes Docs/precadsr_layout_front.pdf | Bin 0 -> 169284 bytes create mode 100644 Hardware/Panel/precadsr_panel_al/precadsr_panel_al.sch create mode 100644 Panels/futura medium bt.ttf Normal file View File Panels/FireballSpell_Large_bw.png.svg Normal file View File Synth_Manuals/minimoog_operation_manual_1.pdf Executable file View File true L1 2 keahS oidaR PSU/Synth Mages Power Word Stun.kicad_sch 2887 lines Latest commits for file Synth Mages Power Word Stun.kicad_prl 78 lines { "board": { updates to rev 2 d89db83df1 revised README.md to rev 2 beta by adding +5V, and both trigger/gate and CV routing adds ideas for a VC version. ** not a very large 17.5mm panel hole+snip off pin, add holes for a 1uF capacitor; expand a bit, but also size it for a single 1.5 mm² wires, reinforced insulation, conductor diameter 1.7mm, size source Multi-Contact FLEXI-xV 1.0 (https://ec.staubli.com/AcroFiles/Catalogues/TM_Cab-Main-11014119_(en)_hi.pdf), bend radius 3 times outer diameter, generated with kicad-footprint-generator Resistor SMD 2010 (5025 Metric), square (rectangular) end terminal, IPC_7351 nominal with elongated pad for handsoldering. (Body size source: https://docs.google.com/spreadsheets/d/1BsfQQcO9C6DZCsRaXUlFlo91Tg2WpOkGARC1WS5S8t0/edit?usp=sharing), generated with kicad-footprint-generator JST SUR series connector, SM14B-SHLS-TF (http://www.jst-mfg.com/product/pdf/eng/eSHL.pdf), generated with kicad-footprint-generator Soldered wire connection with double feed through strain relief, for 3 times outer diameter, generated with kicad-footprint-generator ipc_gullwing_generator.py TSOP-I, 24 Pin (http://www.alfarzpp.lv/eng/sc/AS3330.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py LQFN, 10 Pin (https://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/lfcspcp/cp_10_10.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py Nexperia wafer level chip-size package; 15 bumps (6-3-6), 2.37x1.17mm, 15 Ball, 6x3 Layout, 0.4mm Pitch, https://www.ti.com/lit/ml/mxbg419/mxbg419.pdf, https://www.ti.com/lit/ds/symlink/tmp117.pdf Texas Instruments, DSBGA, 3.415x3.535x0.625mm, 64 ball 8x8 area grid, NSMD pad definition Appendix A BGA 1924 1 FL1925 FLG1925 FL1926 FLG1926 FL1928 FLG1928 FL1930 FLG1930 Artix-7 BGA, 19x19 grid, 10x10mm package, pitch 0.65mm UFBGA-32, 6x6, 4x4mm package, pitch 0.4mm; see section 6.8 of http://www.st.com/resource/en/datasheet/stm32f746zg.pdf WLCSP-144, 12x12 raster, 7x7mm package, pitch 0.4mm; see section 7.5 of http://www.st.com/resource/en/datasheet/stm32l152zc.pdf WLCSP-64, 8x8 raster, 5x5mm package, pitch 0.4mm; see section 7.6 of http://www.st.com/resource/en/datasheet/stm32l151cc.pdf WLCSP-64, 8x8 raster, 3.141x3.127mm package, pitch 0.4mm; http://ww1.microchip.com/downloads/en/devicedoc/atmel-8235-8-bit-avr-microcontroller-attiny20_datasheet.pdf#page=208 WLCSP-16, 1.409x1.409mm, 16 Ball, 4x4 Layout, 0.5mm Pitch, https://www.ti.com/lit/ds/symlink/sn74lvc1g17.pdf#page=42, https://www.ti.com/lit/ml/mxbg018l/mxbg018l.pdf BGA 5 0.5 YZP Texas Instruments, DSBGA, 1.5195x1.5195x0.600mm, 8 ball 3x3 area grid, YZP, YZP0010, 1.86x1.36mm, 10 Ball, 3x4 Layout, 0.5mm Pitch, https://www.st.com/resource/en/datasheet/stm32wl54jc.pdf ST UFBGA-121, 6.0x6.0mm, 121 Ball, 11x11 Layout, 0.5mm Pitch, https://www.diodes.com/assets/Datasheets/AP22913.pdf WLCSP-4, 0.64x0.64mm, 4 Ball, 2x2 Layout, 0.5mm Pitch, https://www.st.com/resource/en/datasheet/stm32mp151a.pdf ST TFBGA-361, 12.0x12.0mm, 361 Ball, 23x23 Layout, 0.5mm Pitch, DSC0010J, WSON, http://www.ti.com/lit/ds/symlink/tps61201.pdf Plastic Small Outline Package (MS) [MSOP], variant of 8-lead surface-mounted (SMD) DIP package, row spacing 15.24 mm (600 mils 48-lead surface-mounted (SMD) DIP package, row spacing 16.51 mm (650 mils), SMDSocket, LongPads THT DIP DIL PDIP 2.54mm 22.86mm 900mil Socket 64-lead though-hole mounted DIP package, row spacing 8.9.

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