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HLE-105-02-xxx-DV-LC, 5 Pins per row (http://suddendocs.samtec.com/prints/hle-1xx-02-xxx-dv-xx-xx-xx-mkt.pdf, http://suddendocs.samtec.com/prints/hle-dv-footprint.pdf), generated with kicad-footprint-generator ipc_noLead_generator.py QFN, 52 Pin (https://www.onsemi.com/pub/Collateral/848H-01.PDF), generated with kicad-footprint-generator ipc_gullwing_generator.py DSO DSO-8 SOIC SOIC-8 Infineon PG-DSO 12 pin, exposed pad: 4.5x8.1mm, with thermal pad with vias; (http://www.ti.com/lit/ds/symlink/drv8800.pdf HTSSOP, 16 Pin (https://www.analog.com/media/en/package-pcb-resources/package/pkg_pdf/lfcspcp/cp-16/CP_16_22.pdf.

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