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BackFrom 0c682bad950fdd2cbbdce033cf243faec76364d8 Mon Sep 17 00:00:00 2001 Subject: [PATCH] Finished PCB, passes all passable DRCs Footprint selection, some PCB layout choices Add CV in.
- 0.881919 0 vertex -5.69599 3.1314 20.
- B10P-VH-FB-B, shrouded (http://www.jst-mfg.com/product/pdf/eng/eVH.pdf), generated with kicad-footprint-generator Mounting.