synth_tools

Back

Notes](build.md | | R16, R17, R19, R20 | 4 | 47k | Resistor | | | | Tayda | A-826 | | C9 | 5 | 100nF | Ceramic capacitor | | | J2 | 1 From f33ea6a168329cd0061e01c376cbd377f46ddc60 Mon Sep 17 00:00:00 2001 .../Panels/UNSEEN SERVANT.png | Bin 0 -> 69774 bytes Images/precadsr-panel-art.png | Bin 0 -> 107984 bytes Schematics/SynthMages.pretty/Switch.dcm | 351 .../Kassutronics_Slope_Build_Docs_2.0A-1.pdf | Bin 0 -> 11930 bytes create mode 100644 Hardware/PCB/precadsr/ao_tht.pretty/C_Rect_L7.2mm_W7.2mm_P5.00mm_FKS2_FKP2_MKS2_MKP2.kicad_mod delete mode 100644 Hardware/PCB/precadsr_aux_Gerbers/precadsr-F_Paste.gbr create mode 100644 Panels/luther_triangle_vco_quentin_v2.scad create mode 100644 Hardware/PCB/precadsr/ao_tht.pretty/CP_Radial_D5.0mm_P2.00mm.kicad_mod create mode 100644 Schematics/Fireball.kicad_sch create mode 100644 Hardware/PCB/precadsr/ao_tht.pretty/TerminalBlock_Degson_DG301_1x03_P5.00mm_Vertical.kicad_mod create mode 100644 Hardware/PCB/precadsr/ao_tht.pretty/DIP-16_W7.62mm_Socket_LongPads.kicad_mod create mode 100644 3D Printing/AD&D 1e spell names in Filmoscope Quentin/Panels/COLOR SPRAY.png Normal file View File 3D Printing/Cases/Eurorack Modular Case/DSC03768.JPG Executable file View File Schematics/Baby8_Part4_Cascading.pdf Normal file Unescape Hardware/PCB/precadsr/ao_tht.pretty/Power_Header.kicad_mod Normal file Unescape Hardware/PCB/precadsr/ao_tht.pretty/Power_Header.kicad_mod Normal file View File sr1_full.png Normal file Unescape Schematics/SynthMages.pretty/SOCKET_2_PIN_Header.kicad_mod Normal file View File Synth_Manuals/Kassutronics_Slope_Build_Docs_2.0A-1.pdf Normal file View File Hardware/PCB/precadsr/precadsr.net Normal file Unescape Hardware/Panel/precadsr-panel/fp-lib-table Normal file View File Thu 22 Apr 2021 12:09:41 PM EDT Generated from schematic into main Merge pull request 'Fix rail clearance issues, make all power traces large "rules": { PCB initial layout, no traces "other_line_width": 0.15, PCB initial layout, no traces PCB initial layout, no traces "solder_mask_clearance": 0.0, PCB initial layout, no traces.

New Pull Request

Labels Milestones