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Normal -0.366304 0.925194 0.0991856 facet normal 5.991654e-08 -1.000000e+00 -7.418487e-07 facet normal 9.996064e-01 2.805506e-02 -1.366834e-07 vertex -1.045657e+02 9.930452e+01 1.855000e+01 facet normal -0.705407 0.0694492 0.705392 facet normal 6.911728e-01 -1.725568e-03 -7.226875e-01 facet normal 0.367742 0.111553 0.923213 vertex -8.55797 -2.64292 3.82299 vertex -0.111422 -8.98903 3.82299 facet normal -0.0546401 0.554737 0.83023 facet normal -0.0761302 0.0624786 0.995138 vertex 6.48017 4.32991 5.97318 facet normal 0.0846387 -0.279018 0.956549 facet normal -0.0992127 -0.014848 -0.994955 vertex -9.68198 -2.48363 0.0440226 facet normal -0.0818425 -0.081922 0.993273 facet normal 9.581206e-01 2.863638e-01 -8.203024e-04 facet normal -0.308981 0.0243251 0.950757 facet normal 4.633939e-01 -6.112069e-03 8.861313e-01 vertex -1.086215e+02 9.665134e+01 9.207041e+00 vertex -1.088519e+02 9.715134e+01 9.338879e+00 facet normal 0.956902 -0.290412 -3.99024e-06 facet normal 0.370053 0.60387 0.705975 facet normal 9.953861e-01 1.931690e-14 -9.595103e-02 facet normal 8.179095e-01 -7.493654e-03 -5.752981e-01 facet normal 9.996069e-01 -2.803745e-02 0.000000e+00 vertex -1.005052e+02 1.053817e+02 3.455000e+01 facet normal -4.225759e-001 -1.881454e-003 9.063256e-001 facet normal -0.0896453 0.0431708 -0.995038 vertex -1.87526 9.8175 0.0484862 facet normal 9.127901e-01 -4.084288e-01 -3.071142e-04 vertex -9.090385e+01 9.578066e+01 1.855000e+01 vertex -9.898495e+01 1.059137e+02 1.055000e+01 vertex -1.033348e+02 9.486071e+01 2.550000e+00 facet normal 0.288318 -0.956944 0.0336339 vertex 7.11659 -1.0528 7.9152 facet normal 0.111484 -0.258274 0.959618 facet normal -0.80732 -0.0635162 0.586685 facet normal 9.609584e-001 2.766931e-001 0.000000e+000 facet normal -2.880153e-004 -5.040268e-004 -9.999998e-001 ## Documentation: * [Schematic](Docs/precadsr.pdf) * PCB layout: [front](Docs/precadsr_layout_front.pdf), [back](Docs/precadsr_layout_back.pdf) * [BOM](Docs/precadsr_bom.md) * [Build notes](Docs/build.md) How to use for rounding teh top edge. [mm] top_rounding_radius = 8; // Cylinder faces to use Git repository From 40ce306867b3d353457e134a232ee65f5767bece Mon Sep 17 00:00:00 2001 Subject: [PATCH 1/2] Fix rail clearance issues, make all power traces large "rules": { PCB initial layout, no traces PCB initial layout, no traces "other_line_width": 0.15, PCB initial layout, no traces "silk_line_width": 0.15, PCB initial layout, no traces "silk_line_width": 0.15, "silk_text_italic": false, "silk_text_size_h": 1.0, "silk_text_size_v": 1.0, "silk_text_thickness": 0.15, "silk_text_upright": false, "zones": { "min_clearance": 0.5 } }, updates to rev 2 beta.

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