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Value="2.5" unit="mm"/> Update luther's layout Update luther's layout Drill report for precadsr-panel.kicad_pcb Created on Tue Mar 5 20:19:51 2024 Copper Layer Stackup: ============================================================= L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains plated through holes are merged with plated holes count 16 Not plated through holes: ============================================================= c9e81f0cc630cea052574ce7c50b3e82145bb626 969311f00cbb6d6ece9a25b5fb1d4e2884e468c0 main MK_SEQ/Schematics/Unseen Servant/Unseen Servant.kicad_prl | 2 | 10uF | Polarized capacitor | | | | | Tayda | A-1605 | | S1 | 1 | Conn_01x07 | *(optional) SIP socket, 2.54 mm, 1x2 (see [build notes](build.md)) | | J5, J12, J13 | 3 | A1M | Potentiometer | | Tayda | A-1531 or A-557 | synth_tools/Schematics/SynthMages.pretty/Micro SPDT (3 pin).kicad_mod Normal file Unescape Hardware/PCB/precadsr/ao_tht.pretty/D_DO-41_SOD81_P7.62mm_Horizontal.kicad_mod Normal file Unescape width = 40; // [1:1:84.

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