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Back*-backups */fp-info-cache *.kicad_prl *.sch-bak *~ _autosave-* *.tmp *-save.pro *-save.kicad_pcb fp-info-cache # Netlist files (exported from Eeschema *.csv *.lck ########################## # Additional ignored # KiCad backups folders temp_* # Compressed files *.zip # Mac stuff *.DS_Store # Emacs temps *~ \#* # LTSpice Simulations/*.log Simulations/*.raw Simulations/*.txt Copper Layer Stackup: ============================================================= L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains plated through holes are merged with plated holes count 16 Latest commits for file Synth Mages Power Word Stun Panel.kicad_pro "filename": "Synth Mages Power.
- -0.95694 0.288329 0.0336382 facet normal -0.0464245 0.0868542.
- -0.865129 -0.462436 0.19418 facet normal 3.267696e-001 5.718465e-001 7.524714e-001.
- -4.550773e+000 1.747200e+001 facet normal 8.884534e-01 -4.589668e-01.
- 0.923223 facet normal -0.471394 -0.881923.