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Package, datasheet: https://www.ti.com/lit/ds/symlink/tpsm53602.pdf Texas Instruments, DSBGA, area grid, YZR pad definition Appendix A Virtex-7 BGA, 34x34 grid, 35x35mm package, 1mm pitch; https://www.xilinx.com/support/documentation/user_guides/ug475_7Series_Pkg_Pinout.pdf#page=273, https://www.xilinx.com/support/documentation/user_guides/ug475_7Series_Pkg_Pinout.pdf#page=284, https://www.xilinx.com/support/documentation/user_guides/ug865-Zynq-7000-Pkg-Pinout.pdf#page=84, NSMD pad definition Appendix A BGA 484 0.8 SBG485 SBV485 LFCSP, exposed pad, thermal vias, DDA0008J (http://www.ti.com/lit/ds/symlink/tps5430.pdf Texas Instruments (see http://www.ti.com/lit/ds/symlink/lm5118.pdf HSOIC, 8 Pin (https://www.monolithicpower.com/en/documentview/productdocument/index/version/2/document_type/Datasheet/lang/en/sku/MP2303A/document_id/494#page=14), generated with kicad-footprint-generator ipc_gullwing_generator.py SOIC, 28 Pin (https://www.semtech.com/uploads/documents/sx1272.pdf#page=125), generated with kicad-footprint-generator Hirose DF11 through hole, DF11-32DP-2DSA, 16 Pins (http://www.farnell.com/datasheets/2157639.pdf), generated with kicad-footprint-generator Molex MicroClasp Wire-to-Board System, 55932-0830, 8 Pins per row (https://cdn.harwin.com/pdfs/M20-890.pdf), generated with kicad-footprint-generator Molex 734 Male header.

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