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Photos ## Documentation: * [Schematic](Docs/precadsr.pdf) * PCB layout: [front](Docs/precadsr_layout_front.pdf), [back](Docs/precadsr_layout_back.pdf) * [BOM](Docs/precadsr_bom.md) * [Build notes](Docs/build.md) How to use for rounding teh top edge. ≥30 means "round, using current quality setting". Top_rounding_faces = 30; // Height (in mm). Set to zero if you are happy with your fetcher, use the 4 pins for trigger, gate, and CV routing } ], "meta": { More tweaks after pro review "clearance": 0.2, "diff_pair_gap": 0.25, "diff_pair_via_gap": 0.25, "diff_pair_width": 0.2, "line_style": 0, "microvia_diameter": 0.3, "microvia_drill": 0.1, "name": "Default", "pcb_color": "rgba(0, 0, 0, 0.000)", "schematic_color": "rgba(0, 0, 0, 0.000)", "schematic_color": "rgba(0, 0, 0, 0.000)", "schematic_color": "rgba(0, 0, 0, 0.000)", "schematic_color": "rgba(0, 0, 0, 0.000)", From a924f971822abf6232c3be63abeee0abf33f42cb Mon Sep 17 00:00:00 2001 Subject: [PATCH] Initial commit README.md | 3 | A1M | Potentiometer | | | S1 | 1 | Conn_01x04 | Pin socket, 2.54 mm, 1x10 Pin header, 2.54 mm, 1x2 (see build notes) 1 SIP socket, 2.54 mm, 1x4 Light emitting diode Push button switch OFF-(ON CMOS General Purpose Timer, 555 compatible, PDIP-8 0.2A Ic, 40V Vce, Small Signal NPN Transistor, TO-92 | | R25, R27, R29 | 3 | 1 | 4.7 uF | Polarized capacitor | Tayda | A-1672 | | | | Tayda | A-553 | | | | | | | | | Tayda | A-1672 | | | C13 | 1 | Conn_01x04 | Pin header 2.54 mm spacing | | | | R14, R15, R18 | 3 create mode 100644 Fireball/Fireball_panel.kicad_pcb 2666d5803f Footprint selection, some PCB layout choices 4d8e233e93 Add CV (and knob) controlled glide to schematic Add pulldown resistors for reset debounce cap; formatting checkpoint before getting really weird with WireIt dd8c61c34f A couple more minor clearance tweaks 9e7b04561b Add ground fills, fix some clearance issues, add PCB slot, more options for potentiometer spoke placement Fix rail clearance issues, make all power traces large "rules": { PCB initial layout, no traces }, More tweaks after pro review "multiple_net_names": "warning", "net_not_bus_member": "warning", "no_connect_connected": "warning", "no_connect_dangling": "warning", "pin_not_connected": "error", "pin_not_driven": "error", "pin_to_pin": "warning", "power_pin_not_driven": "error", "similar_labels": "warning", More tweaks after pro review "multiple_net_names": "warning", "net_not_bus_member": "warning", "no_connect_connected": "warning", "no_connect_dangling": "warning", "pin_not_connected": "error", "pin_not_driven": "error", "pin_to_pin": "warning", "power_pin_not_driven": "error", "similar_labels": "warning", More tweaks after pro review Apply jlcpcb's design rules, small.

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