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BackAdditional ignored # KiCad backups folders *-backups # Compressed files *.zip # Mac stuff *.DS_Store # Emacs temps *~ \#* # LTSpice Simulations/*.log Simulations/*.raw Simulations/*.txt Copper Layer Stackup: ============================================================= L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains plated through holes are merged with plated holes count 16 ============================================================= Total unplated holes count 16 Not plated through holes: unplated through holes.
- = 11; pointy_external_indicator_pokey_outey_ness = -0.0; // pokey_outey_value.
- -1.99403 19.9467 vertex -7.73568 -2.38614 19.9509.