Labels Milestones
BackOmron G6K-2G relay package http://omronfs.omron.com/en_US/ecb/products/pdf/en-g6k.pdf Relay Omron G6SK-2F, see http://omronfs.omron.com/en_US/ecb/products/pdf/en-g6s.pdf Relay Omron G6S-2G, see http://omronfs.omron.com/en_US/ecb/products/pdf/en-g6s.pdf Relay Omron G6SK-2G, see http://omronfs.omron.com/en_US/ecb/products/pdf/en-g6s.pdf Fujitsh FTR B3S B3SA Relay J JLeg AXICOM HF3-Series Relay Pitch 1.27mm Slug Down Thermal Vias (PowerSO-20) [JEDEC MO-166] (http://www.st.com/resource/en/datasheet/tda7266d.pdf, www.st.com/resource/en/application_note/cd00003801.pdf HSOP 11.0 x 15.9mm Pitch 1.27mm SSOP, 8 Pin (https://ams.com/documents/20143/36005/AS7341_DS000504_3-00.pdf/#page=63 LGA, 8 Pin (http://www.allegromicro.com/~/media/Files/Datasheets/A4950-Datasheet.ashx#page=8), generated with kicad-footprint-generator JST SUR series connector, S14B-XASK-1N-BN (http://www.jst-mfg.com/product/pdf/eng/eXA1.pdf), generated with kicad-footprint-generator Molex 734 Male header (for PCBs); Angled solder pin 1 (so is open or ground). Part of speed \nswitch mod (0 F.Cu signal (31 "B.Cu" signal (32 "B.Adhes" user "B.Adhesive" (33 "F.Adhes" user "F.Adhesive" 36 "B.SilkS" user "B.Silkscreen" (37 "F.SilkS" user "F.Silkscreen" 40 "Dwgs.User" user "User.Drawings" (41 "Cmts.User" user "User.Comments" 42 "Eco1.User" user "User.Eco1" 43 "Eco2.User" user "User.Eco2" 46 "B.CrtYd" user "B.Courtyard" 47 "F.CrtYd" user "F.Courtyard" (48 "B.Fab" user (49 "F.Fab" user (aux_axis_origin 0 0 Y N 1 F N DEF SW_Coded_SH-7080 SW 0 40 Y Y 1 F N DEF SW_SPST_Lamp SW 0 40 Y N 1 F N DEF Kosmo_panel_Mounting_Holes_Slotted H 0 40 N N 1 F N DEF SW_DIP_x11 SW 0 0 0 Y N 1 F N DEF SW_DIP_x01 SW 0 0 Dual VCA, based roughly on Moritz Klein's schematic, with features added from Skull and Circuit's VCA v1.3. 3D Printing/Panels/AD&D 1e spell names in Filmoscope Quentin/Panels' Delete '3D Printing/AD&D 1e spell names in Filmoscope Quentin/Panels/PRISMATIC SPHERE.png Normal file Unescape Drill report for precadsr-panel.kicad_pcb Created on Tue Mar 5 20:19:51 2024 Copper Layer Stackup: ============================================================= L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains plated through holes: ============================================================= T1 3.200mm 0.1260" (4 holes) (with 4 slots) T2 5.000mm 0.1969" (1 hole) Total plated holes unplated through holes: ============================================================= -1.086297e+02 9.665134e+01 5.544934e+00 vertex -1.084873e+02 9.695134e+01 5.334736e+00.