Labels Milestones
BackPitch; https://www.xilinx.com/support/documentation/user_guides/ug475_7Series_Pkg_Pinout.pdf#page=292, https://www.xilinx.com/support/documentation/user_guides/ug865-Zynq-7000-Pkg-Pinout.pdf#page=88, NSMD pad definition Appendix A BGA 484 1 FG484 FGG484 Artix-7 BGA, 19x19 grid, 10x10mm package, pitch 0.4mm; see section 7.3 of http://www.st.com/resource/en/datasheet/stm32l011k3.pdf WLCSP-36, 6x6 raster, 2.605x2.703mm package, pitch 0.4mm; see section 7.5 of http://www.st.com/resource/en/datasheet/stm32f446ze.pdf WLCSP-81, 9x9 raster, 4x4mm package, pitch 0.5mm; see section 7.6 of http://www.st.com/resource/en/datasheet/stm32f207vg.pdf WLCSP-66, 8x9 raster, 3.767x4.229mm package, pitch 0.4mm; see section 6.3 of http://www.st.com/resource/en/datasheet/stm32f469ni.pdf WLCSP-180, 13x14 raster, 5.537x6.095mm package, pitch 0.8mm; see section 7.1 of http://www.st.com/resource/en/datasheet/stm32f051t8.pdf UFBGA-100, 12x12 raster, 10x10mm package, pitch 0.4mm; see section 7.1 of http://www.st.com/resource/en/datasheet/DM00282249.pdf WLCSP-90, 10x9 raster, 4.223x3.969mm package, pitch 0.4mm; see section 7.4 of http://www.st.com/resource/en/datasheet/stm32f091vb.pdf WLCSP-64, 8x8 raster, 5x5mm package, pitch 0.65mm; see section 7.1 of http://www.st.com/resource/en/datasheet/stm32f103tb.pdf LFBGA-144, 12x12 raster, 10x10mm package, pitch 0.5mm (http://www.analog.com/media/en/package-pcb-resources/package/56702234806764cp_24_3.pdf, http://www.analog.com/media/en/technical-documentation/data-sheets/ADL5801.pdf LFCSP VQ, 48 pin, exposed pad: 4.5x8.1mm, with thermal pad HTSSOP32: plastic thin shrink small outline package; 14 leads; body width 4.4 mm; (see NXP sot054_po.pdf to-92 sc-43 sc-43a sot54 PA33 diode SOD70 2-pin TO-92 horizontal, leads molded, narrow, drill 0.75mm (see NXP SSOP-TSSOP-VSO-REFLOW.pdf and sot519-1_po.pdf SSOP16: plastic shrink small outline 7,5mm long https://toshiba.semicon-storage.com/info/docget.jsp?did=53548&prodName=TLP2770 6-Lead Plastic Dual Flat No-Lead Package, 3x3mm Body (see Microchip Packaging Specification.
- -6.288171e-01 -3.272236e-04 vertex -1.030079e+02 1.033858e+02.
- 27.4 + tolerance; rail_depth = 27.4 + tolerance.
- -5.696089e-001 7.524701e-001 vertex -6.338055e-001 4.341748e+000 2.488700e+001 facet normal.