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9.527699e-01 3.511617e-04 vertex -1.001369e+02 1.055465e+02 2.655000e+01 facet normal -7.693146e-01 -1.734006e-04 6.388701e-01 facet normal 0.0729058 0.338907 0.937991 facet normal -3.674715e-001 -6.434121e-001 6.715546e-001 facet normal -4.773786e-001 -8.345221e-001 2.751047e-001 vertex -4.039823e-003 4.618314e+000 2.473857e+001 facet normal -7.070971e-001 -1.829706e-003 7.071140e-001 vertex 5.125004e+000 -2.071941e+000 2.484855e+001 facet normal -0.338843 -0.0729619 0.938009 facet normal -0.629653 0.76827 0.115322 facet normal -2.971779e-001 -5.209042e-001 8.002150e-001 facet normal 0.695445 -0.464678 -0.548115 vertex -1.28613 -3.10499 18.4724 facet normal 0.49996 0.866048 8.13718e-05 facet normal 0 0.833884 0.55194 Latest commits for file sr1_full.png From 1e6cc98f413992554cb33b458eea58dbb7544fc2 Mon Sep 17 00:00:00 2001 Subject: [PATCH] Update luther's layout Drill report for precadsr-panel.kicad_pcb Created on Tue Mar 5 20:19:51 2024 Copper Layer Stackup: ============================================================= L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains T1 3.200mm 0.1260" (4 holes) (with 4 slots) T2 5.000mm 0.1969" (1 hole) T3 7.000mm 0.2756" (6 holes T4 10.000mm 0.3937" (4 holes) (with 4 slots T2 5.000mm 0.1969" (1 hole Total plated holes unplated through holes: ============================================================= T1 3.200mm 0.1260" (4 holes) (with 4 slots T2 5.000mm 0.1969" (1 hole) T3 7.000mm 0.2756" (6 holes) T4 10.000mm 0.3937" (4 holes) (with 4 slots) T2 5.000mm 0.1969" (1 hole) T3 7.000mm 0.2756" (6 holes) T4 10.000mm 0.3937" (4 holes) (with 4 slots) T2 5.000mm 0.1969" (1 hole) T3 7.000mm 0.2756" (6 holes) T4 10.000mm 0.3937" (4 holes) T5 15.200mm 0.5984" (1 hole Total plated holes unplated through holes: ============================================================= T1 3.200mm 0.1260" (4 holes) (with 4 slots T2 5.000mm 0.1969" (1 hole) Total plated holes count 16 ============================================================= Total unplated holes count 16 Latest commits for file Schematics/SynthMages.pretty/Perfboard_1x12.kicad_mod # Temporary files fp-info-cache # Netlist files (exported from Pcbnew) *.dsn *.ses */fp-info-cache c58f541d7e Upload files to '3D Printing/AD&D 1e spell names in Filmoscope Quentin typeface Created by Cvpcb (2015-03-25 BZR 5536)-product date = sam. 04 avril 2015 11:21:18 UTC update=Tue 20 Apr 2021 10:22:18 AM EDT Generated from schematic into main Reviewed-on: https://gitea.circuitlocution.com/synth_mages/MK_VCO/pulls/1 51a08380a9 Added.

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