Labels Milestones
BackHttps://www.xilinx.com/support/documentation/user_guides/ug865-Zynq-7000-Pkg-Pinout.pdf#page=77, NSMD pad definition (http://www.ti.com/lit/ds/symlink/lmc555.pdf, http://www.ti.com/lit/an/snva009ag/snva009ag.pdf Texas Instruments, DSBGA, area grid, YZR pad definition Appendix A BGA 324 0.8 GateMate FPGA Maxim WLP-12, W121H2+1, 2.008x1.608mm, 12 Ball, 4x3 Layout, 0.4mm Pitch, YFF0006, NSMD pad definition Appendix A BGA 484 0.8 RS484 Artix-7 BGA, 16x16 grid, 17x17mm package, 1mm pitch; https://www.xilinx.com/support/documentation/user_guides/ug475_7Series_Pkg_Pinout.pdf#page=280, NSMD pad definition Appendix A BGA 1156 1 RF1157 RF1158 Virtex-7 BGA, 44x44 grid, 45x45mm package, 1mm pitch; https://www.xilinx.com/support/documentation/user_guides/ug475_7Series_Pkg_Pinout.pdf#page=271, ttps://www.xilinx.com/support/documentation/user_guides/ug475_7Series_Pkg_Pinout.pdf#page=281, https://www.xilinx.com/support/documentation/user_guides/ug865-Zynq-7000-Pkg-Pinout.pdf#page=82, NSMD pad definition Appendix A BGA 1156 1 FF1157 FFG1157 FFV1157 FF1158 FFG1158 FFV1158.
- 3.880389e-004 9.961951e-001 vertex -2.598724e+000 -4.625798e+000 2.495526e+001 facet normal.
- 43915-xx12, 6 Pins per.
- Normal 8.721423e-001 -4.892524e-001 0.000000e+000 vertex.
- JackHoleDepth = 10; // Center two holes.