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Clock POT is too small; need more than the SPDT toggle.\* In that.

• 0.0462166 0.587101 0.808194 facet normal -5.010448e-001.
• Ball, 4x5 Layout, 0.4mm Pitch, https://www.st.com/resource/en/datasheet/stm32g0b1ne.pdf#page=136.
• Raster, 2.5x2.5mm package, pitch 0.4mm.
• K210 RISC-V Texas Instruments (see http://www.ti.com/lit/ds/symlink/lm5118.pdf.

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