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Back-07:00 f80e4975fb checkpoint before getting really weird with WireIt A couple more GND-stitch vias Undo converting GND to GND_JMP and fix everything that broke Finished PCB, passes all passable DRCs Footprint selection, some PCB layout choices From c6741b48f0ef8a6e69ecbca1a47bc4f4b481e2a3 Mon Sep 17 00:00:00 2001 Subject: [PATCH] schematic start, and some example modules Envelope/Envelope.kicad_pcb | 2 | 10uF | Polarized capacitor | | 8 | 1N4148 | 100V 0.15A standard switching diode, DO-35
- Connector, B6B-PH-K (http://www.jst-mfg.com/product/pdf/eng/ePH.pdf), generated with kicad-footprint-generator Samtec.
- Vertex -4.063540e+000 -2.413246e+000 2.486861e+001.
- FA-128 (https://support.epson.biz/td/api/doc_check.php?dl=brief_FA-128&lang=en), 2x1.6mm^2 package Diode MicroSMP (DO-219AD.