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Back*.ses New KiCad version; non Al panel Gerbers # Exported BOM files *.xml *.csv # KiCad backups folders *-backups # Compressed files *.zip # Mac stuff *.DS_Store # Emacs temps *~ \#* # LTSpice Simulations/*.log Simulations/*.raw Simulations/*.txt Copper Layer Stackup: ============================================================= L1 : F.Cu front L2 : B.Cu back Drill file 'precadsr-panel.drl' contains plated through holes are merged with plated holes count 16 Not plated through.
- 6.715497e-001 facet normal -7.011925e-01.
- -0.533683 0.0993123 vertex 8.09017 -5.87785 0 facet normal.
- For: GMSTBVA_2,5/6-G-7,62; number of pins: 05.
- Vertex 5.35776 -4.75988 6.96188 vertex 7.04362 -0.568952.